Protocol Support

AVL-AXI is based on the AXI5 specification. ARM no longer refer to AXI3 or AXI4, rather preferring a matrix of options and paramaters.

AVL-AXI has followed the naming convention for these where possible.

For full details see AXI Documentation.

Where signals are indicated as supported as sideband, the signals / fields can be added to the protocol, but apart from allowing assignment and randomization as correctly sized logic buses there is no additional capability.

These signals should not effect the protocol and aren’t modelled in any of the provided Manager or Subordinate components. They are, however, captured by the monitors and included in trace files.

Features / Configuration

Parameter Name	Supported
Atomic_Transactions	YES
BURST_Present	YES
Busy_Support	SIDEBAND
CACHE_Present	SIDEBAND
Cache_Line_Size	SIDEBAND
Cache_Stash_Transactions	SIDEBAND
Check_Type	NO
CMO_On_Read	SIDEBAND
CMO_On_Write	SIDEBAND
Coherency_Connection_Signals	NO
Consistent_DECERR	YES
DeAllocation_Transactions	SIDEBAND
Device_Normal_Independence	NO
DVM_Message_Support	NO
DVM_v8	NO
DVM_v8_1	NO
DVM_v8_4	NO
DVM_v9_2	NO
Exclusive_Accesses	YES
Fixed_Burst_Disable	YES
InvalidateHint_Transaction	SIDEBAND
LEN_Present	YES
Loopback_Signals	YES
Max_Transaction_Bytes	YES
MEC_Support	SIDEBAND
MMUFLOW_Present	SIDEBAND
MPAM_Support	SIDEBAND
MTE_Support	NO
Multi_Copy_Atomicity	SIDEBAND
NSAccess_Identifiers	SIDEBAND
Ordered_Write_Observation	YES
PBHA_Support	SIDEBAND
Persist_CMO	SIDEBAND
Poison	SIDEBAND
Prefetch_Transaction	SIDEBAND
PROT_Present	SIDEBAND
QoS_Accept	YES
QOS_Present	SIDEBAND
Read_Data_Chunking	NO
Read_Interleaving_Disabled	YES
REGION_Present	SIDEBAND
Regular_Transactions_Only	YES
RLAST_Present	YES
RME_Support	SIDEBAND
Shareable_Cache_Support	SIDEBAND
Shareable_Transactions	SIDEBAND
SIZE_Present	YES
STASHLPID_Present	SIDEBAND
STASHNID_Present	SIDEBAND
Trace_Signals	SIDEBAND
Unique_ID_Support	YES
UnstashTranslation_Transaction	SIDEBAND
Untranslated_Transactions	SIDEBAND
Wakeup_Signals	YES
WLAST_Present	YES
Write_Plus_CMO	SIDEBAND
WriteDeferrable_Transaction	SIDEBAND
WriteNoSnoopFull_Transaction	SIDEBAND
WriteZero_Transaction	SIDEBAND
WSTRB_Present	SIDEBAND
AXI_Transport	YES
Num_RP	YES
Shared_Credits	YES

Note

*SIDEBAND indicates driver and checks that values are consistent between request and response.